Β8( >radxa,rockpi-n10vamrs,rk3399pro-vmarc-somrockchip,rk3399pro +7Radxa ROCK Pi N10aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/mmc@fe310000y/mmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  4 ?cpu@1cpuarm,cortex-a53pscid  4 ?cpu@2cpuarm,cortex-a53pscid  4 ?cpu@3cpuarm,cortex-a53pscid  4 ?cpu@100cpuarm,cortex-a72psci   ?cpu@101cpuarm,cortex-a72psci   ?idle-statesGpscicpu-sleeparm,idle-stateTe|x? cluster-sleeparm,idle-stateTe|? display-subsystemrockchip,display-subsystempmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mbus simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@   /apb_pclk?Pdma-controller@ff6e0000arm,pl330arm,primecelln@   /apb_pclk??pcie@f8000000rockchip,rk3399-pcie ;axi-baseapb-base+EVb G/aclkaclk-perfhclkpm0123lsyslegacyclient|` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay   default)9interrupt-controllerIE?ethernet@fe300000rockchip,rk3399-gmac0 lmacirq8ighfjfM/stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac^ stmmacethlyokayinputrgmii default 'P(  mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р M/biuciuciu-driveciu-sample'^yreset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр2  L/biuciuciu-driveciu-sample'^zresetokayGQct  default!"#$ sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N2 N/clk_xinclk_ahbemmc_cardclock% phy_arasan^okayG?usb@fe380000 generic-ehci8&'usbokayusb@fe3a0000 generic-ohci:&'usbokayusb@fe3c0000 generic-ehci<()usbokayusb@fe3e0000 generic-ohci> ()usbokayusb@fe800000rockchip,rk3399-dwc3+0G/ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3i/refbus_earlysuspendotg*+usb2-phyusb3-phy utmi_wide=Vw^okayusb@fe900000rockchip,rk3399-dwc3+0G/ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3n/refbus_earlysuspendotg,-usb2-phyusb3-phy utmi_wide=Vw^ disableddp@fec00000rockchip,rk3399-cdn-dp r2  ruo/core-clkpclkspdifgrf./^ HJspdifdptxapbcorel disabledportsport+endpoint@00?endpoint@11?interrupt-controller@fee00000 arm,gic-v3E+IP  ?interrupt-controller@fee20000arm,gic-v3-its?ppi-partitionsinterrupt-partition-0?interrupt-partition-1?saradc@ff100000rockchip,rk3399-saradc>Pe/saradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA2 AU /i2cpclk; default2+okayi2c@ff120000rockchip,rk3399-i2cB2 BV /i2cpclk# default3+okayhym8563@51haoyu,hym8563Qhym8563 default4 5i2c@ff130000rockchip,rk3399-i2cC2 CW /i2cpclk" default6+okay?i2c@ff140000rockchip,rk3399-i2cD2 DX /i2cpclk& default7+ disabledi2c@ff150000rockchip,rk3399-i2cE2 EY /i2cpclk% default8+ disabledi2c@ff160000rockchip,rk3399-i2cF2 FZ /i2cpclk$ default9+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`/baudclkapb_pclkc( default:;okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRa/baudclkapb_pclkb( default< disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSb/baudclkapb_pclkd( default=okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTc/baudclkapb_pclke( default> disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[/spiclkapb_pclkD5? ? :txrx default@ABC+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\/spiclkapb_pclk55? ? :txrx defaultDEFG+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]/spiclkapb_pclk45??:txrx defaultHIJK+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^/spiclkapb_pclkC5??:txrx defaultLMNO+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_/spiclkapb_pclk5PP :txrx defaultQRST^+ disabledthermal-zonescpuDdZhUtripscpu_alert0xppassive?Vcpu_alert1x$passive?Wcpu_critxs criticalcooling-mapsmap0Vmap1WHgpuDdZhUtripsgpu_alert0x$passive?Xgpu_critxs criticalcooling-mapsmap0X Ytsadc@ff260000rockchip,rk3399-tsadc&aO2 qOd/tsadcapb_pclk tsadc-apbls initdefaultsleepZ[Zokay?Uqos@ffa58000syscon ?cqos@ffa5c000syscon ?dqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon ?gqos@ffa70080syscon ?hqos@ffa74000syscon@ ?eqos@ffa76000syscon` ?fqos@ffa90000syscon ?iqos@ffa98000syscon ?\qos@ffaa0000syscon ?jqos@ffaa0080syscon ?kqos@ffaa8000syscon ?lqos@ffaa8080syscon ?mqos@ffab0000syscon ?]qos@ffab0080syscon ?^qos@ffab8000syscon ?_qos@ffac0000syscon ?`qos@ffac0080syscon ?aqos@ffac8000syscon ?nqos@ffac8080syscon ?oqos@ffad0000syscon ?pqos@ffad8080syscon qos@ffae0000syscon ?bpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+?pd_iep@34"*\pd_rga@33!*]^pd_vcodec@31*_pd_vdu@32 *`apd_gpu@35#*bpd_edp@25lpd_emmc@23*cpd_gmac@22f*dpd_sd@27L*epd_sdioaudio@28*fpd_tcpc0@8~}pd_tcpc1@9 pd_usb3@24*ghpd_vio@15+pd_hdcp@21r*ipd_isp0@19*jkpd_isp1@20*lmpd_vo@16+pd_vopb@17*nopd_vopl@18*psyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2?io-domains&rockchip,rk3399-pmu-io-voltage-domainokay1qspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5rr/spiclkapb_pclk< defaultstuv+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7rr"/baudclkapb_pclkf( defaultw disabledi2c@ff3c0000rockchip,rk3399-i2c<r 2 r r /i2cpclk9 defaultx+okaypmic@20rockchip,rk809  yrk808-clkout1rk808-clkout2 defaultz@ao{{{{{||{}{regulatorsDCDC_REG1vdd_log q(p@regulator-state-memWp DCDC_REG2 vdd_cpu_l q(pq@? regulator-state-memWDCDC_REG3vcc_ddr@regulator-state-memDCDC_REG4 vcc3v3_sys2Z(2Z@?}regulator-state-memp2ZDCDC_REG5 vcc_buck5!(!?|regulator-state-memp!LDO_REG1 vcca_0v9 ( ?regulator-state-memp LDO_REG2vcc_1v8w@(w@?qregulator-state-mempw@LDO_REG3vcc_0v9 ( regulator-state-memp LDO_REG4 vcca_1v8:(:?regulator-state-memp:LDO_REG5 vdd1v5_dvp`(`regulator-state-memWLDO_REG6vcc_1v5`(`regulator-state-memWLDO_REG7 vccio_3v0-(-?regulator-state-memWLDO_REG8 vccio_sdw@(2Z? regulator-state-memWLDO_REG9vcc_sd2Z(2Zregulator-state-memWSWITCH_REG1 vcc5v0_usb2LK@(LK@regulator-state-mempLK@SWITCH_REG2 vccio_3v32Z(2Z?regulator-state-memWi2c@ff3d0000rockchip,rk3399-i2c=r 2 r r /i2cpclk8 default~+ disabledi2c@ff3e0000rockchip,rk3399-i2c>r 2 r r /i2cpclk: default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultr/pwmokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultr/pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  defaultr/pwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 defaultr/pwm disabledvideo-codec@ff650000rockchip,rk3399-vpue rq lvepuvdpu /aclkhclk^iommu@ff650800rockchip,iommue@slvpu_mmu /aclkiface^?video-codec@ff660000rockchip,rk3399-vdecftlvdpu /axiahbcabaccore^ iommu@ff660480rockchip,iommu f@f@u lvdec_mmu /aclkiface^ ?iommu@ff670800rockchip,iommug@*liep_mmu /aclkiface disabledrga@ff680000rockchip,rk3399-rgah7m/aclkhclksclkjgi coreaxiahb^!efuse@ff690000rockchip,rk3399-efusei+} /pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruulr2(J?rclock-controller@ff760000rockchip,rk3399-cruvl@BCx@2#g/;рxh<4`#Fׄׄ ?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+?io-domains"rockchip,rk3399-io-voltage-domainokay  mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wo/dphy-refdphy-cfggrf^  disabledusb2-phy@e450rockchip,rk3399-usb2phyP{/phyclkclk_usbphy0_480mokay?&host-port  llinestateokay?'otg-port 0ghjlotg-bvalidotg-idlinestateokay?*usb2-phy@e460rockchip,rk3399-usb2phy`|/phyclkclk_usbphy1_480mokay?(host-port  llinestateokay?)otg-port 0lmolotg-bvalidotg-idlinestate disabled?,phy@f780rockchip,rk3399-emmc-phy$/emmcclk okay?%pcie-phyrockchip,rk3399-pcie-phy/refclk  2phyokay?phy@ff7c0000rockchip,rk3399-typec-phy|~}/tcpdcoretcpdphy-ref~2^Luphyuphy-pipeuphy-tcphylokaydp-port ?.usb3-port ?+phy@ff800000rockchip,rk3399-typec-phy/tcpdcoretcpdphy-ref2^ Muphyuphy-pipeuphy-tcphyl disableddp-port ?/usb3-port ?-watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ /pclktimerspdif@ff870000rockchip,rk3399-spdifB5P:tx /mclkhclkU default^ disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sl'5PP:txrx/i2s_clki2s_hclkV default^ disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(5PP:txrx/i2s_clki2s_hclkW default^ disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)5PP:txrx/i2s_clki2s_hclkX^ disabled?vop@ff8f0000rockchip,rk3399-vop-lit>w2ׄ/aclk_vopdclk_vophclk_vop^ axiahbdclkokayport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?1iommu@ff8f3f00rockchip,iommu?w lvopl_mmu /aclkiface^okay?vop@ff900000rockchip,rk3399-vop-big>v2ׄ/aclk_vopdclk_vophclk_vop^ axiahbdclkokayport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?0iommu@ff903f00rockchip,iommu?v lvopb_mmu /aclkiface^okay?iommu@ff914000rockchip,iommu @P+ lisp0_mmu /aclkiface^ .iommu@ff924000rockchip,iommu @P, lisp1_mmu /aclkiface^ .hdmi-soundsimple-audio-card Ii2s b |hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqop/iahbisfrvpllgrfcec^(lokay  default?portsport+endpoint@0?endpoint@1?mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- po/refpclkphy_cfggrf^apbl+ disabledports+port@0+endpoint@0?endpoint@1?mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qo/refpclkphy_cfggrf^apbl+ disabledports+port@0+endpoint@0?endpoint@1?edp@ff970000rockchip,rk3399-edp jlo /dppclkgrf default^dpl disabledports+port@0+endpoint@0?endpoint@1?gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 ljobmmugpu^# disabled ?Ypinctrlrockchip,rk3399-pinctrll +gpio0@ff720000rockchip,gpio-bankrr  IE?gpio1@ff730000rockchip,gpio-banksr  IE?ygpio2@ff780000rockchip,gpio-bankxP  IEgpio3@ff788000rockchip,gpio-bankxQ  IE?gpio4@ff790000rockchip,gpio-bankyR  IE?5pcfg-pull-up ?pcfg-pull-down ?pcfg-pull-none ?pcfg-pull-none-12ma  ?pcfg-pull-none-13ma  ?pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low clockclk-32k !edpedp-hpd !?gmacrgmii-pins !    ?rmii-pins !     i2c0i2c0-xfer !?xi2c1i2c1-xfer !?2i2c2i2c2-xfer !?3i2c3i2c3-xfer !?6i2c4i2c4-xfer !  ?~i2c5i2c5-xfer !  ?7i2c6i2c6-xfer !  ?8i2c7i2c7-xfer !?9i2c8i2c8-xfer !?i2s0i2s0-2ch-bus` !i2s0-8ch-bus !?i2s1i2s1-2ch-busP !?sdio0sdio0-bus1 !sdio0-bus4@ !sdio0-cmd !sdio0-clk !sdio0-cd !sdio0-pwr !sdio0-bkpwr !sdio0-wp !sdio0-int !sdmmcsdmmc-bus1 !sdmmc-bus4@ !   ?$sdmmc-clk ! ?!sdmmc-cmd ! ?"sdmmc-cd !?#sdmmc-wp !sleepap-pwroff !ddrio-pwroff !spdifspdif-bus !?spdif-bus-1 !spi0spi0-clk !?@spi0-cs0 !?Cspi0-cs1 !spi0-tx !?Aspi0-rx !?Bspi1spi1-clk ! ?Dspi1-cs0 ! ?Gspi1-rx !?Fspi1-tx !?Espi2spi2-clk ! ?Hspi2-cs0 ! ?Kspi2-rx ! ?Jspi2-tx ! ?Ispi3spi3-clk !?sspi3-cs0 !?vspi3-rx !?uspi3-tx !?tspi4spi4-clk !?Lspi4-cs0 !?Ospi4-rx !?Nspi4-tx !?Mspi5spi5-clk !?Qspi5-cs0 !?Tspi5-rx !?Sspi5-tx !?Rtestclktest-clkout0 !test-clkout1 !test-clkout2 !tsadcotp-pin !?Zotp-out !?[uart0uart0-xfer !?:uart0-cts !?;uart0-rts !uart1uart1-xfer !  ?<uart2auart2a-xfer ! uart2buart2b-xfer !uart2cuart2c-xfer !?=uart3uart3-xfer !?>uart3-cts !uart3-rts !uart4uart4-xfer !?wuarthdcpuarthdcp-xfer !pwm0pwm0-pin !?pwm0-pin-pull-down !vop0-pwm-pin !vop1-pwm-pin !pwm1pwm1-pin !?pwm1-pin-pull-down !pwm2pwm2-pin !?pwm2-pin-pull-down !pwm3apwm3a-pin !?pwm3bpwm3b-pin !hdmihdmi-i2c-xfer !hdmi-cec !?pciepci-clkreqn-cpm !pci-clkreqnb-cpm !?pcie-pwr !?hym8563hym8563-int !?4pmicpmic-int-l !?zvbus_hostusb1-en-oc !?vbus_typecusb0-en-oc !?opp-table0operating-points-v2 /? opp00 :Q A 5 O@opp01 :#F A 5opp02 :0, A Popp03 :< AHopp04 :G AB@opp05 :Tfr A*opp-table1operating-points-v2 /? opp00 :Q A 5 O@opp01 :#F A 5opp02 :0, A opp03 :< A Yopp04 :G A~opp05 :Tfr Aopp06 :_" Aopp07 :kI AOopp-table2operating-points-v2?opp00 :  A 5opp01 :@ A 5opp02 :ׄ A opp03 :e A Yopp04 :#F AHopp05 :/ Aexternal-gmac-clock fixed-clocksY@ clkin_gmac?vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin(?vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@(LK@ `?{vbus-hostregulator-fixed default vbus_host `{ k 5?vbus-typecregulator-fixed default vbus_typec `{ k 5?vcc-pcie-regulatorregulator-fixed k 5 default vcc3v3_pcie `{?chosen ~serial2:1500000n8 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsarm,pl330-periph-burstclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clock-parentsclock_in_outphy-modesnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayassigned-clocksphy-supplysnps,reset-gpiomax-frequencyfifo-depthassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvqmmc-supplycd-gpiosarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-off-in-suspendregulator-suspend-microvoltregulator-ramp-delayregulator-on-in-suspend#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsvin-supplyenable-active-highstdout-path