/* VGAlib version 1.2 - (c) 1993 Tommy Frandsen */ /* */ /* This library is free software; you can redistribute it and/or */ /* modify it without any restrictions. This library is distributed */ /* in the hope that it will be useful, but without any warranty. */ /* Multi-chipset support Copyright 1993 Harm Hanemaayer */ /* TVGA 8900c code taken from tvgalib by Toomas Losin */ #define REGCOUNT 72 /* Trident SVGA mode 5d - 640x480x256 1M NI */ static const unsigned char g640x480x256_regs[REGCOUNT] = { /* CRTC */ 0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,0x00,0x40,0x00,0x00, 0x00,0x00,0x00,0x00,0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Sequencer */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0x63, /* 7 extra CRT registers */ 0xff,0x00,0x00,0x00,0x00,0x00,0x80, /* Extra Sequencer old and new mode registers 13 and 14 */ 0x30,0xa8, 0x00,0x42, 0x00 }; /* Trident SVGA mode 5d - 640x480x256 512k + 1M I */ static const unsigned char g640x480x256i_regs[REGCOUNT] = { 0xc3,0x9f,0xa1,0x84,0xa6,0x00,0x0b,0x3e,0x00,0x40,0x00,0x00, 0x00,0x00,0x00,0x00,0xea,0x8c,0xdf,0x50,0x40,0xe7,0x04,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Seq. */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0xeb, /* extra CRT regs */ 0xff,0x00,0x00,0x00,0x00,0x00,0x80, /* Extra seq. regs */ 0x00,0xa8, 0x01,0x02, 0x00 }; /* Trident SVGA mode 5e - 800x600x256 1M NI */ static const unsigned char g800x600x256_regs[REGCOUNT] = { /* CRTC */ 0x7e,0x63,0x64,0x81,0x6b,0x18,0x99,0xf0,0x00,0x60,0x00,0x00, 0x00,0x00,0x00,0x00,0x6e,0x84,0x57,0x32,0x40,0x5e,0x93,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Sequencer */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0x2b, /* Extra CRT registers */ 0xff,0x00,0x00,0x00,0x00,0x00,0x80, /* Seq. old and new mode registers */ 0x10,0xa8, 0x01,0x02, 0x00 }; /* Trident SVGA mode 5e - 800x600x256 512k */ static const unsigned char g800x600x256i1_regs[REGCOUNT] = { /* CRTC */ 0xeb,0xc7,0xc9,0x8d,0xcb,0x86,0x4a,0x1f,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x2f,0x81,0x2b,0xc8,0x40,0x2f,0x47,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Sequencer */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0xa3, /* extra CRTC */ 0xff,0x00,0x00,0x00,0x00,0x00,0x84, /* extra Seq. */ 0x00,0xa8, 0x01,0x02, 0x00 }; /* Trident SVGA mode 5e - 800x600x256 1M I */ static const unsigned char g800x600x256i_regs[REGCOUNT] = { /* CRTC */ 0x7b,0x63,0x64,0x9e,0x69,0x92,0x6f,0xf0,0x00,0x60,0x00,0x00, 0x00,0x00,0x00,0x00,0x58,0x8a,0x57,0x32,0x40,0x58,0x6f,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Seq. */ 0x01,0x01,0x0f,0x00,0x0e, 0xef, /* extra CRTC */ 0xff,0x00,0x00,0x00,0x00,0x00,0x80, 0x30,0xa8, 0x00,0x42, 0x00 }; /* Trident SVGA mode 62 - 1024x768x256 1M I */ static const unsigned char g1024x768x256i_regs[REGCOUNT] = { /* CRTC */ 0x99,0x7f,0x81,0x1b,0x83,0x19,0x98,0x1f,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x81,0x0f,0x7f,0x80,0x40,0x83,0x95,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Sequencer */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0x2b, /* Extra CRTC regs */ 0xff,0x00,0x00,0x00,0x00,0x00,0x84, /* Ext. sequencer */ 0x10,0xa8, 0x00,0x02, 0x00 }; /* Trident SVGA mode 62 - 1024x768x256 1M NI */ static const unsigned char g1024x768x256_regs[REGCOUNT] = { /* CRTC */ 0xa2,0x7f,0x80,0x85,0x87,0x90,0x2c,0xfd,0x00,0x60,0x00,0x00, 0x00,0x00,0x00,0x00,0x0f,0x81,0xff,0x40,0x40,0x07,0x26,0xa3, /* ATC */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b, 0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00, /* Graphics */ 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff, /* Sequencer */ 0x01,0x01,0x0f,0x00,0x0e, /* Misc. output */ 0x27, /* Extended CRTC regs */ 0xff,0x00,0x00,0x00,0x00,0x00,0x80, /* Ext. seq. */ 0x10,0xa8, 0x01,0x02, 0x00 };